Abstract: Compute-in-memory (CIM) is a new computing paradigm that addresses the memory-wall problem in the deep learning accelerator. In this presentation, first I will present our DNN+NeuroSim benchmark framework that is interfaced with Tensorflow/PyTorch to evaluate different device technologies for state-of-the-art DNN models. We will discuss about the pros and cons of various non-volatile memory candidates and the most important device specifications for inference/training, respectively. Second, I will present our RRAM-CIM prototype chips that are integrated with CMOS peripheral circuitry and its performance. Furthermore, we will show our experimental characterizations of the multilevel RRAM's variability and reliability and their impact on DNN inference accuracy. To overcome the challenges of the RRAM-CIM prototypes we identified, we propose monolithic 3D integration with back-end-of-line (BEOL) transistors as a potential solution. Finally, I will discuss about the recent progresses in ferroelectric transistor (FeFET) for synaptic device, from the multi-domain switching physics (to understand the history effect of minor loop) to the array-level operation schemes (i.e. drain erase). I will propose the 3D vertical NAND array architecture for FeFET to implement the large-scale DNN model on-chip.
Bio: Shimeng Yu is an associate professor of electrical and computer engineering at the Georgia Institute of Technology. He received the B.S. degree in microelectronics from Peking University in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University in 2011 and 2013, respectively. From 2013 to 2018, he was an assistant professor at Arizona State University.
Prof. Yu’s research interests are nanoelectronic devices and circuits for energy-efficient computing systems. His expertise is on the emerging non-volatile memories (e.g., RRAM, ferroelectrics) for different applications such as deep learning accelerator, neuromorphic computing, monolithic 3D integration, and hardware security.
Among Prof. Yu’s honors, he was a recipient of the NSF Faculty Early CAREER Award in 2016, the IEEE Electron Devices Society (EDS) Early Career Award in 2017, the ACM Special Interests Group on Design Automation (SIGDA) Outstanding New Faculty Award in 2018, the Semiconductor Research Corporation (SRC) Young Faculty Award in 2019, and the ACM/IEEE Design Automation Conference (DAC) Under-40 Innovators Award in 2020, etc.
Prof. Yu is active in professional services. He served or is serving many premier conferences as technical program committee, including IEEE International Electron Devices Meeting (IEDM), IEEE Symposium on VLSI Technology, etc. He is a senior member of the IEEE.
Please note: This e-Workshop is only available to the JUMP research community, such as Principal Investigators, postdoc researchers, students, and corporate sponsors. ASCENT is one of six JUMP centers administered by SRC. For access to full program information, please go to src.org. Thank you for interest in ASCENT.