ASCENT Theme 4: Comprehensive Modeling, Design, and Benchmarking of Spintronic Devices for Memory and Compute-in-Memory Applications


Location: webex

Presented by Piyush Kumar, Siri Narla, and Azad Naeemi (Georgia Tech)

Abstract: We present a comprehensive set of experimentally validated/calibrated models that capture the physics of the nanoscale spin-orbit-torque (SOT) devices. The models, for the first time, capture spatial variations in the electric current density, electric field, local resistivity, and spin diffusion length in SOT layers and show an excellent match with experimental results. To evaluate write energy, error rate, thermal stability, and retention time for field-assisted PMA magnets, we use micromagnetic and macrospin simulations and validate the models with experiments. The models are then used to benchmark optimized SOT-MRAM devices with various channel materials against STT-MRAM and ME-MRAM at the array level.
In addition to the memory applications, we propose novel designs for ternary content addressable memories (TCAMs) based on SOT-MRAM and ME-MRAM devices and use compact physical models and SPICE simulations to optimize them for both write and search operations and to benchmark them against their counterparts based on SRAM and FeFETs.

Theme 4 Tasks covered:  

2776.060 Modeling for Novel Materials, Devices, Interconnects, and Packaging Solutions
2776.061 Benchmarking for Novel Materials, Devices, Interconnects, and Packaging Solutions


This meeting is only available to the JUMP research community, such as Principal Investigators, Postdoc researchers, Students, and Industry/Government liaisons.