Oxide and Chalcogenide Transistors for Monolithic Three-Dimensional Integrated Circuit (M3D) Applications
Abstract: In the first half we will cover oxide transistors for M3D applications. Oxide semiconductors have recently found commercial success as thin film transistors for display applications. This workshop will start with an overview of the fundamental advantage of oxide semiconductors as channel materials for low temperature processed transistors over their covalent semiconductor counterparts. We will identify the potential avenues for aggressive scaling of the oxide transistors embedded in the back-end-of-line (BEOL) and explore disruptive electronics, such as M3DIC, enabled by oxide electronics We will evaluate the critical electrical characteristics, such as carrier transport, electrostatics, stability, extrinsic resistance associated with oxide semiconductor transistors fabricated at low temperatures, and their future improvement strategies. We will also present a benchmark study of the current and projected performance of oxide transistors and compare against with other semiconductor channel materials that are under evaluation for BEOL transistor applications.
In the second half we will discuss recent progress with atomically thin two-dimensional (2D) transistors for M3D applications. We have grown monolayer, three-atom-thick [Mo,W][S,Se]2 semiconductors on varied substrates including SiO2, Al2O3, AlN, and on 3D sidewalls and trenches with high aspect ratio. Improving electrical contacts led to the realization of 10-40 nm MoS2 transistors with the highest current reported to date for a monolayer semiconductor (>0.5 mA/um), near ballistic limits. Experiments with ultrawide transistors revealed that the off-state current is as low 10 aA/um, which is normally below detectable limits in conventional test structures. We have also uncovered that ZrSe2and HfSe2 have native high-κ dielectrics ZrO2 and HfO2, which are of key technological relevance. Ongoing work is focused on further improving device contacts & doping, reducing defects, and lowering the growth temperature with industry-friendly MOCVD. Throughout, we will also discuss benchmarking of 2D transistors with other technologies and with fundamental limits.
Suman Datta is the Stinson Professor of Nanotechnology in the Department of Electrical Engineering at the University of Notre Dame, Notre Dame, Indiana, where he directs research in the Nanoelectronic Devices Laboratory. He is also the Director of the SRC/DARPA sponsored Applications and Systems-driven Center for Energy-efficient integrated NanoTechnologies (ASCENT). In addition, he is the Director of the SRC/NSF sponsored Center for Extremely Energy Efficient Collective Electronics (EXCEL). His research involves brain-inspired computing, high performance general-purpose computing and collective state computing with extended CMOS and post CMOS devices. Prof. Datta has co-authored 9 book chapters and over 320 refereed journal and conference papers, and holds 181 patents. His work has received over 17,500 citations (h-index = 70).
Eric Pop is a Professor of Electrical Engineering (EE) and Materials Science & Engineering (by courtesy) at Stanford, where he leads the SystemX Heterogeneous Integration focus area. He was previously on the faculty of UIUC (2007-13) and worked at Intel (2005-07). His research interests are at the intersection of electronics, nanomaterials, and energy. He received his PhD in EE from Stanford (2005) and three degrees from MIT (MEng and BS in EE, BS in Physics). His honors include the Presidential Early Career Award (PECASE), Young Investigator Awards from the Navy, Air Force, NSF and DARPA, and several best paper and best poster awards with his students. He is an Editor of the journal 2D Materials, has served as General Chair of the Device Research Conference, and on program committees of IEDM, VLSI, APS, and MRS. In his spare time he tries to avoid injuries while snowboarding and in a past life he was a DJ at KZSU 90.1 FM, from 2000-04. Additional information about the Pop Lab is available online at http://poplab.stanford.edu.
Please note: This e-Workshop is only available to the JUMP research community, such as Principal Investigators, postdoc researchers, students, and corporate sponsors. ASCENT is one of six JUMP centers administered by SRC. For access to full program information, please go to src.org. Thank you for interest in ASCENT.