ASCENT Theme 4: SAPIENS: An RRAM-Based Non-Volatile Associative Memory Chip for One-Shot Learning and Inference at the Edge

SAPIENS: An RRAM-Based Non-Volatile Associative Memory Chip for One-Shot Learning and Inference at the Edge

Presenter: Haitong Li (Stanford)

Abstract:
Learning from a few examples (one/few-shot learning) on the fly is a key challenge for on-device machine intelligence. We present SAPIENS (Stanford Associative memory for Programmable, Integrated Edge iNtelligence via life-long learning and Search), a 64-kbit nonvolatile associative memory (AM) chip based on 40-nm TSMC RRAM technology, demonstrating chip-level one-shot learning and inference. Serving as the backend for memory-augmented neural networks (MANNs), the fully integrated RRAM-CMOS AM core enables long-term feature embedding and retrieval. Using only one example per class for 32 unseen classes during on-chip learning with the Omniglot dataset, SAPIENS achieves 79% measured inference accuracy, comparable to edge software model accuracy (82%), while reaching 118 GOPS/W for in-memory L1 distance computation and prediction.

Bio:
Haitong Li is an EE Ph.D. candidate at Stanford University, CA, supervised by Prof. H.-S. Philip Wong. He received M.S. in electrical engineering from Stanford University in 2017, and B.S. in microelectronics from Peking University, China, in 2015. His research focuses on enabling energy-efficient computing systems with emerging device technologies. He serves as a committee member for IEEE EDS VLSI Technology and Circuits Committee. Haitong is a recipient of 2019 IEEE EDS PhD Student Fellowship and 2016 IEEE EDS Masters Student Fellowship.

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